Rui Zhang

About Rui Zhang

17+ years\' experience in advanced packaging (2D, 2.5D, and 3D), substrate/PCB/Rigid-flex/FPC fabrication, SMT & assembly;• Tech leader with embracing possibility thinking; invention disclosures and patents for various substrates and package architectures;• Delivered impressive products with notable success by managing design optimization, process development, cost reduction, and operation quality control;• Enabled the 1st IC substrate factory in China, from ground up to HVM for 10nm technology;• Certified Six Sigma Green Belt

Experience

1. Principal Engineer, Asic Product Division (Apd)

   Broadcom

   Dec 2024 — Present · San Jose, CA, US

   Packaging solution for next-gen custom accelerators (XPUs) and compute ASICs;• 3.5D integration (3D silicon stacking + 2.5D CoWoS packaging);• Face-to-Face (F2F) 3D HCB (Hybrid copper bonding);

Education

• Tsinghua University

  B.S, Electrical Engineering

  2002 — 2006

• Auburn University

  Master of Electrical Engineering, Electronics Assembly and Packaging

  2007 — 2008

• Auburn University

  Ph.D, Electronics Assembly and Packaging

  2009 — 2011

Skills

• Sputtering
• Statistical Process Control (Spc)
• Supplier Management
• Photolithography
• Layout
• Pecvd
• Lithography
• Electronics Packaging
• Reliability
• Process Development
• Design of Experiments
• Manufacturing
• R&D
• Smt
• Semiconductors
• Labview
• Scanning Electron Microscopy
• Electron Beam Lithography
• Optics
• Spc
• Failure Analysis
• Jmp
• Matlab
• Assembly
• Lean Manufacturing
• Thin Films
• Wire Bonding