Ruchik Shastri

SOC Design Engineer at Intel Corporation

Role
Soc Design Engineer at Intel
Location
Portland, OR, US
LinkedIn followers
500 followers

About Ruchik Shastri

After doing my masters from Indian Institute Of Science, i joined Intel India. Worked on various backend and frontend design of CPU core blocks. Developed knowledge base of X86 architecture and in depth knowledge about floating point arithmetic units. Currently working on Graphics Media blocks. Designed and implemented multimillion gate units from scratch, involving micro architecture definition, RTL design and gate count optimization. Also handled unit level validation for the same which involved test plan generation, coverage coding, test content generation and testbench coding. Have in depth experience on RTL design work of datapath intensive as well as control path intensive design blocks. Also involved in various personal hobby projects and personal research activities involving system design, camera system development, motion activated camera, sensor networks (specially PIR sensor networks), board design,debug and bring up. On software side have developed many RTOS based systems, embedded C based library development, linux driver development and network socket programming projects.

Experience

  1. Soc Design Engineer

    Intel

    Oct 2021 — Present · Portland, OR, US

    in this job role, I am responsible for leading the design of Last Level Cache subsystem for Intel\'s Next Generation Client Processor Chips. Along with the cache design I handle the responsibility of integration for multiple Intellectual property blocks going into those system on chip systems.

Education

  • Rosary High School,Vadodara

    Higher Secondary School, PCMB

    2001 — 2004

  • South Gujarat University

    Bachelor of Engineering (B.E.), Electrical, Electronics and Communications Engineering

    2004 — 2008

  • Indian Institute of Science (IISc)

    MTECH CEDT, Electronic Design and Technology

    2009 — 2011

Skills

  • Integrated Circuit Design
  • Microprocessors
  • Embedded C
  • Soc
  • Wireless Sensor Networks
  • Verilog
  • Ic
  • Perl
  • Embedded Systems
  • Systemverilog
  • Device Drivers
  • Formal Verification
  • Power Optimization
  • Hardware
  • Application-Specific Integrated Circuits (Asic)
  • Rtos
  • Field-Programmable Gate Arrays (Fpga)
  • Matlab
  • Camera System Development
  • C
  • Programming
  • Semiconductors
  • Processors
  • Microcontrollers
  • Vhdl
  • Simulations
  • Embedded Software Programming
  • Rtl Design
  • C++
  • Static Timing Analysis
  • Algorithms
  • Firmware
  • Very-Large-Scale Integration (Vlsi)
  • Electronics
  • System on a Chip (Soc)
  • Linux
  • Modelsim
  • Embedded Linux
  • Fpga
  • Asic

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Ruchik Shastri — Soc Design Engineer at Intel in Portland, OR, US | Unifers