Rohit Kankal
RTL Design Engineer
- Role
- Senior Rtl Design Engineer at 恩智浦半导体
- Location
- Pune District, MH, IN
- LinkedIn followers
- 500 followers
About Rohit Kankal
Curious about everything,self motivated individual and an avid learner!Passionate engineer with diverse experience and skills set in RTL Design,SoC Design, IP Design, FPGA design and prototyping, embedded systems prototyping, 5G PHY, RISC V, pre-sales and post sales support, technical training,etc. Took end to end ownership of several blocks and IP designs right from understanding the specs, designing the microarchitecture till its verification and validation.
Experience
Senior Rtl Design Engineer
Apr 2022 — Present · Pune, IN
WiFi | Bluetooth | IoT] Member of Design team in Connectivity group -> SoC Design, IP Design-> SoC Integration-> Lint, DFT-Lint checks-> CDC closure-> IP DV using UVM based tests & SVA-> Pre & Post silicon validation & bring-up.
Education
Thakur College Of Engineering and Technology , University of Mumbai.
Bachelor of Engineering (B.E.), Electronics and Telecommunication Engineering
Indian Institute of Science (IISc)
PG Level Advanced Certification Program, VLSI Chip Design
Centre for Development of Advanced Computing (C-DAC)
Post Graduate Diploma, VLSI Design
Indian Institute of Technology, Madras
Master of Technology - MTech, Electrical Engineering (ICS)
Royal College of Arts, Science and Commerce , Mira Road (E)
HSC(12th), Science (Junior College)
N.H. English Academy , Mira Road (E).
SSC(10th), High school
Find verified contacts for anyone on LinkedIn
Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.
Free plan included · No credit card required
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.