Rohith Thota Venkata
Layout Verification Engineer
- Role
- Layout Verification Engineer at Intel
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Rohith Thota Venkata
From;28/03/2022-to;31/05/2022. Completed internship on DFT at Anora Instrumentation Private Limited, Chennai, Where I have learned about various DFT techniques and to get more insight I\'m currently pursuing DFT course at ChipEdge Technologies. I have learned various techniques which are Scan, DRC Fixing, Compression, JTAG Boundary-Scan, On-chip Clock Controller(OCC), At-speed testing and ATPG. I have all the experience to work in real-time
Experience
Layout Verification Engineer
Apr 2024 — Present · Bengaluru, IN
Education
New Horizon College of Engineering
Bachelor of Engineering - BE, Electronics and Communications Engineering
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