Rohit Chaurey
- Role
- Post-si Cpu Validation Engineer at Qualcomm
- Location
- Santa Clara, CA, US
- LinkedIn followers
- 500 followers
Experience
Post-si Cpu Validation Engineer
Oct 2022 — Present
Education
National Institute of Technology Calicut
M.Tech, Microelectronics & VLSI Design
2007 — 2009
Technocrats Institute of Technology
B.E., Electronics & Communication
2002 — 2006
Skills
- Circuit Design
- Hardware Architecture
- Intel
- Soc
- Debugging
- Vlsi
- Rtl Design
- Visual Basic
- Allegro
- Pcie
- Cadence Schematic Capture
- Pcb Design
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