Robert Eilers

About Robert Eilers

A results-oriented electrical engineer with over 20+ years of broad experience in integrated circuit design, verification, test, and characterization. A technical leader with broad knowledge to direct execution of advanced analog and mixed-signal designs, including testchips to prove circuit designs on leading-edge process nodes and package technologies, A manager with demonstrated success in guiding engineering teams from pathfinding, through pre-Si design and verification, and post-Si support. An expert in mixed-signal validation, low-power design and verification methodologies, chip-level integration with both analog (full custom) and digital (RTL, DV, RTL2GDSII) design flows, and a strong grasp of integrated circuit design and test challenges.Specialties: end-to-end silicon project planning, cross-domain silicon execution tracking and management, silicon testchips for IP, process, and package de-risk, team resourcing/hiring/optimization, contract management, budgeting and finance roll-up, Verification Strategy and Test Planning, Mixed-Signal Verification, digital and micro-architecture verification, OVM/UVM/CRV, RTL Design, low power analysis and verification, custom digital circuit design, silicon substrate isolation analysis, product characterization, product sort/class test, product failure analysis

Experience

1. Sr Director Silicon Engineering

   Microsoft

   Sep 2024 — Present · Hillsboro, OR, US

Education

• Oregon State University

  B.S, Computer Engineering

  1997 — 2001

• Portland State University

  M.S., Electrical and Computer Engineering

  2006 — 2009

Skills

• Testing
• Pcb Design
• Analog
• Cadence Schematic Capture
• Cadence Icfb
• Nanosim
• Synopsys Tools
• Verilog-Ams
• Validation
• Xa
• Product Engineering
• Application-Specific Integrated Circuits (Asic)
• Microcontrollers
• Cmos
• Integrated Circuits (Ic)
• Simulations
• Cadence Virtuoso
• Vlsi
• Very-Large-Scale Integration (Vlsi)
• Debugging
• Verilog
• Silicon
• Open Verification Methodology
• Ovm
• Integrated Circuit Design
• Rtl Design
• Asic
• Pll
• Ic
• System on a Chip (Soc)
• Semiconductors
• Mixed Signal
• Verilog-a
• Management
• Functional Verification
• Pcie