Riya Paul

Hardware Development Engineer @Wolfspeed

US

Work as a member of the new product introduction team, developing various 1.2 kV silicon carbide power modules. Serve as a design lead for 1.2 kV case modules. • Conduct Electro-Thermo-Mechanical analyses to optimize design layouts:Perform simulations such as ampacity, package parasitics, and thermal analyses to finalize the design. Run double pulse test circuit simulations in LTspice and Ansys Twin Builder to analyze parallel die dynamic switching behavior and estimate switching losses. Developed a detailed package parasitics simulation method in Ansys Q3D to capture complete RLGC parasitics of the module into a black-box model, which accurately predicts layout complexities, power die compatibility, and facilitates die binning in simulation. This technique has been verified through experimental data and is widely adopted across various module platforms. • Explore the feasibility of the fabrication process through regular manufacturing line tours and market data analysis. • As the design lead, I support process, test, and applications engineers with technical details. • Communicate new designs and simulation capabilities to the entire team via regular tutorials and lunch-and-learns.• Mentor the summer interns and rotation candidates.