Ritik Yadav
Design & Verification Intern @Asicguru Ventures
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WORK HISTORY
Design & Verification Intern @Asicguru Ventures
Noida, IN
Designed & Verified digital blocks including FIFO, SPI, UART and AMBA APB modules, ensuring design accuracy and functionality.Built structured verification environments using SystemVerilog and UVM that improved testbench efficiency and reusability.Strengthened problem-solving, debugging, and collaboration skills while working on real-world IP/SoC Design & Verification projects.Developed a strong foundation in industry practices that connect academic learning with practical chip design challenges.
EDUCATION
MARATHWADA INSTITUTE OF TECHNOLOGY, BULANDSHAHAR
Diploma, Electronics Engineering
ABES Engineering College
B.Tech, Electronics And Communication Engineering
ABOUT RITIK YADAV
Hello I’m Ritik, a passionate VLSI enthusiast with a strong interest in Digital Design…
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