Rishi Kanth Mekala
Associate Director @Samsung Semiconductor
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WORK HISTORY
Associate Director @Samsung Semiconductor
Bengaluru, IN
EDUCATION
Green Wood High School
SSC(10th)
RV VLSI Design Center
Advanced Training in ASIC Design
Sri Chaitanya Junior College
Intermediate(PUC), MPC
CVR College of Engineering
Bachelor of Technology (B.Tech.), Electrical, Electronics and Communications Engineering
SKILLS
ABOUT RISHI KANTH MEKALA
Leading On-chip Power Integrity, Reliability and Jitter Signoff and Methodology for Single Die, 2.5D and 3DIC chips.Expert in Chip Level Power Integrity Analysis Methodology and Solutions o Expert in Static and Dynamic IR/EM, Signal EM, In-Rush, ESD, Scan mode IR signoff analysis using ANSYS RedHawk-SC, RedHawk and Totem on ASIC, AMS and FPGA designs• In-depth understanding and experience in chip thermal problems and solutions on high performance and 3DIC designs using ANSYS RedHawk-Chip Thermal and Self Heat Analysis• Experience in using Electrical Circuit Analysis for IR/EM debug• Good at Layout and Circuit level Power Grid Design and Optimizations• Good at Chip-Package and System co-simulations for solving system level power integrity problems• Good knowledge of static timing analysis and PnR optimizations using voltage drop feedback• Good at python, perl and tcl coding
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