Rishabh P.

Design Verification Engineer @ Espressif Systems || MTech EE @ IITK\'23

Role
Design and Verification Engineer (Asic Risc V) at 乐鑫科技
Location
Kanpur, UP, IN
LinkedIn followers
500 followers

About Rishabh P.

RTL Design Verification & Analog Design Enthusiast

Experience

  1. Design and Verification Engineer (Asic Risc V)

    乐鑫科技

    Jul 2023 — Present · Maharashtra, IN

Education

  • Institute of Engineering & Technology DAVV, Indore

    Bachelor of Engineering - BE

    2015 — 2019

  • Indian Institute of Technology, Kanpur

    Master of Technology - MTech

    2021 — 2023

Find verified contacts for anyone on LinkedIn

Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.

Free plan included · No credit card required

This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.

Rishabh P. — Design and Verification Engineer (Asic Risc V) at 乐鑫科技 in Kanpur, UP, IN | Unifers