Rey G.
Seasoned Semiconductor Test Development Engineer (RF, Mixed-Signal, Digital)
- Role
- Principal Test Development Engineer at Marvell Technology
- Location
- Irvine, CA, US
- LinkedIn followers
- 500 followers
About Rey G.
An accomplished IC Test Development Engineer with a proven track record in three continents: Asia, Europe and North America- With over 25 years hands-on experience in the Semiconductors Industry and has demonstrated success in both \"Big\" Companies as well as \"Small\" Start-ups environments- Has extensive technical knowledge in Developing Product-specific Test Packages (Test Programs & ATE Interfaces) for Wafer Sort, Final Test and KGD Test on a Variety of Products & ATE Platforms- Projects handled: Transceiver SOCs for GSM Applications, Power & Thermal Management ICs for PC Applications, Baseband & Single-chip (BB+RF) SOCs with Embedded Memory for DECT Applications, Medium Power RF Amplifier IC\'s for ISM Applications, Monolithic RF Front-end ICs (RF PA\'s, LNA\'s and Switches) for Wifi, Bluetooth, ZigBee and IoT Applications, Ultra-high Speed Coherent DSP SOCs for Optical Communications- ATE Platforms used: ADV93K, Teradyne (Uflex, J750, Catalyst, Nextest), LTX (MX, CX, Synchro CS, LTX77), Credence ASL3KRF & SPEA C340MXSpecialties: ATE (Automated Test Equipment)Test Development (Semiconductors/ATE)Test-Product Engineering (Semiconductors/ATE)Test Engineering (Semiconductors/ATE)Semiconductors Testing (IC/SOC)Mixed-Signal Testing (IC/SOC)Digital Testing (IC/SOC)RF Testing (IC/SOC)First Silicon ValidationNPI (New Product Introduction)Offshore Test TransferProject Lead/ManagementProduct CharacterizationProduct Reliability & Qual TestingYield & Test Time Optimization
Experience
Principal Test Development Engineer
Jun 2021 — Present · Irvine, CA, US
Education
Don Bosco Technical Institute, Victorias
Highschool, Computer Programming (Technical Elective)
1991 — 1995
University of Saint La Salle
Bachelor of Engineering - BE, Electronics (and Communications) Engineering
1995 — 2000
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