Revanth Chakilam
Layout Design Engineer & CAD/ Methodology Engineer at Ampere | 4+ years experience as Layout Design Engineer
- Role
- Layout Design and Cad Methodology Engineer at Ampere
- Location
- Portland, OR, US
- LinkedIn followers
- 500 followers
About Revanth Chakilam
Experience in Analog & Mixed Signal IC Layout Design on various lower technology nodes…
Experience
Layout Design and Cad Methodology Engineer
Jul 2023 — Present · Portland, OR, US
Education
Portland State University
Master of Science - MS
2022 — 2023
Institute of Aeronautical Engineering
Bachelor of Technology
2014 — 2018
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