Régis Santonja

About Régis Santonja

In the semiconductors industry since 1994 (digital and analog)Mixed-signal IC verification- Advanced Mixed-Signal Verification techniques: Hybrid module-based/UVM testbench (drivers, monitors, sequencer, digital and analog parameter randomization), Metric Driven Verification, Functional coverage (mixed-signal assertions), automatic verification plan (vPlan) update (regressions), accurate Verilog-AMS and fast Wreal modeling, SystemVerilog, DPI, VPI- Motion Sensors verification- Complex Power-Management, Audio and User interface IC (1+ million components)International Team Lead & Project Management- Multi-cultural context (US, Europe, India)- Organize tasks and plannings, priorities, dependencies- Identify blocking situations and coordinate actions- Several projects in parallel- Weekly multi-site team conference calls- Reporting- Project Management Certification at Corphis (Munich)International Experience- California : 9 months- Germany : 9 months- Italy : 3 months- Spain : 2 monthsPersonal Qualities- Rigorous and Methodical- Enthusiast- Team spirit- Open and direct communication- Customer focussed- Ethical- Adaptability (to people, priorities, procedures, environment.)Innovation- Several Technical Awards at Motorola- Involved in several patentsTechnical Lead and digital design- Baseband LPGA for automotive radio networking (CS Route)- Digital ASIC for an ATM switch/router for Matra Ericsson Telecom (MET)- Technical customer interface- Digital ASIC for Interactive VoD (Video On Demand)- ALCATEL- Design For Test expert (JTAG, scan)Specialties: AMS mixed-signal/mixed-level Verification LeadIC System DesignDigital Design

Experience

1. Fellow Mixed Signal Verification

   NXP Semiconductors

   Mar 2025 — Present · US

Education

• ESIEE PARIS

  MSEE, Signal Processing and IC digital design

  1988 — 1993

Skills

• Perl
• Eda
• Semiconductors
• Hardware Design
• Verilog-a
• Integrated Circuit Design
• Mixed Signal
• Circuit Design
• Logic Design
• Analogue
• Power Management
• Hardware Architecture
• Debugging
• Rtl Design
• Silicon
• Microelectronics
• Static Timing Analysis
• Digital Electronics
• Cadence Virtuoso
• Functional Verification
• Vlsi
• Low-Power Design
• Rtl Coding
• Spectre
• Verilog
• Mems
• Jtag
• Circuit Simulation
• Nc-Verilog
• Ncsim
• Timing Closure
• Dft
• Simulations
• Sensors
• System on a Chip (Soc)
• Physical Design
• Primetime
• Simulation
• Soc
• Cmos