Raviteja S.
Senior Engineer @ Qualcomm | Chip Design, Full-Chip STA
- Role
- Senior Engineer at Qualcomm
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Raviteja S.
In a world where change is the only constant, I’m proud to contribute to innovations…
Experience
Senior Engineer
May 2024 — Present · IN
Successfully delivered multiple projects within tight deadlines while maintaining high-quality standards across diverse applications including mobile, automotive and wearables.• Worked on multiple 3nm,4nm technology nodes along with ~100+ PVT corners & multimode design.• Validating the inputs for Proper linking, Annotation, Constraints matrix, Sanity checks, Opens/shorts during extraction & all other run metrics• Worked on flows like LPPI and PG-verilog for multivoltage domain timing closure.• Comparing the timing & drcs correlation from SOC to Block-level and providing the fixes.• Expertise in generating timing fixes using PT-DMSA, Tweaker. Tempus-ECO and Providing manual eco’s.• Providing physical ECO’s in PnR tool for fixing the Drvs such as max_tran, max_cap, noise, leaf_tran etc.
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