Ravindra Pannapur
RTL Design and Microarchitecture - DRAM Controller
- Role
- Pmts Design Engineer at AMD
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Ravindra Pannapur
RTL Design and Microarchitecture of Memory Controller and Design verification of Memory Subsystem
Experience
Pmts Design Engineer
Jul 2025 — Present · Bengaluru, IN
Education
Indian Institute of Science Bangalore
MTech, Electronics Design and Technolgy
2010 — 2012
Sainik School, Bijapur
Schooling
1997 — 2004
M S Ramaiah Institute of Technology, Bangalore.
BE, ELECTRICAL AND ELECTRONICS
2004 — 2008
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