Ravi Vallabhaneni
Senior ASIC Layout Engineer at Micron Technology
- Role
- Senior Asic Layout Engineer at Micron Technology
- Location
- Hyderabad, TG, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
Experience
Senior Asic Layout Engineer
Oct 2020 — Present
Skills
- Drc
- Allegro
- Verilog
- C Language
- Powerpoint
- Lvs
- Symbol and Footprint Creating
- Cadence Virtuoso
- Microsoft Office
- Semiconductors
- Soc
- Pic Basic Programing
- Eda
- Orcad
- Electronic Circuit Design
- Engineering
- Vhdl
- Pcb Layout Design
- Analog
- Asic
- Pll
- Component Testing
- Microsoft Word
- Analog Circuit Design
- Thermal Analysis
- Testing
- Caliber
- Electrical Engineering
- Signal Integrity Analysis
Find verified contacts for anyone on LinkedIn
Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.
Free plan included · No credit card required
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.