Ravi Pathak
IP / SOC Verification Engineer
- Role
- Lead Design Engineer at NXP Semiconductors
- Location
- New Delhi, DL, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Ravi Pathak
I have experience of IP /SOC verification. l Have worked on UVC verification as per DUT criteria and got involved in design activities which includes code generation, fixing issues and coding. Have hands on experience with VLSI Verification, Coverage, GLS verification etc.
Experience
Lead Design Engineer
Jul 2021 — Present · Noida, IN
Education
St Aloysius High School Ranchi
10th
2004 — 2005
Bharath Institute of Higher Education and Research
Bachelor of Technology - BTech, EIE
2007 — 2011
St. Xavier's College, Ranchi
Intermediate, I. Sc
2005 — 2007
Skills
- Management
- Instrumentation
- Project Planning
- Engineering
- Installation
- Process Instrumentation
- Blueprint Reading
- Control Systems Design
- Erection
- Site Engineering
- Automation
- Transformer
- Project Engineering
- Plc
- Electrical Maintenance
- Training
- Commissioning
- Electronics
- Wiring
- Construction
- Supervision
- Control
- Project Management
- Energy
- Menpower Handling
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