Ravi Kumar Gupta

About Ravi Kumar Gupta

Analog Design Engineer with total 5+ years of hands-on experience at Cadence Design Systems, specializing in high-speed analog and mixed-signal circuit design for SerDes applications. I have worked across the full design lifecycle — from architecture and schematic design to PVT verification and silicon bring-up, with successful designs taped out on advanced TSMC 4nm and 3nm nodes.My technical expertise includes comparators, OTAs, LDOs, bandgap references, clock receivers, oscillators, and signal detection circuits, with strong focus on jitter optimization, PSRR, stability, and PVT robustness. I have designed and owned critical analog IP blocks such as Differential Signal Detectors, Boundary Scan circuits, Reference Clock Receivers, High-Speed LDOs, and calibrated oscillators, meeting stringent performance targets for high-speed interfaces.I am particularly strong in translating system requirements into silicon-proven analog architectures, delivering measurable results such as GHz-range bandwidths, sub-ps jitter performance, low-ppm/°C references, and stable high-current regulation. My work has been recognized through internal awards for design quality and successful design-to-silicon execution.I enjoy solving complex analog problems, mentoring juniors, and collaborating across design, verification, and layout teams to deliver robust, manufacturable solutions. Core Skills:Analog & Mixed-Signal IC Design | SerDes | Comparators | OTAs | LDO | BGR | Clocking Circuits | Oscillators | PVT & Monte-Carlo Analysis | Jitter | PSRR | Stability Tools: Cadence Virtuoso (Schematic & Layout) Open to discussing Analog / AMS / SerDes Design opportunities where deep analog expertise and silicon-proven execution are valued.

Experience

1. Staff Engineer

   Marvell Technology

   Feb 2026 — Present · Bengaluru, IN

Education

• Indraprastha Institute of Information Technology, Delhi

  Master of Technology - MTech, VLSI