Ravi Kakadia
Analog Design Engineer at Intel Corporation (PMIC/LPDDR/DDR)
- Role
- Analog Design Engineer at Intel
- Location
- Hyderabad, TG, IN
- LinkedIn followers
- 500 followers
About Ravi Kakadia
Working as an Analog Design Engineer, Skilled in transistor level circuit designing.
Experience
Analog Design Engineer
Sep 2022 — Present · Bengaluru, IN
Worked on Resistance Compensation (RCOMP) circuits to ensure precise on-die termination (ODT) and TX impedance tracking across PVT conditions, improving high-speed I/O performance and compliance- Worked on RxDQS compensation architecture in DDR PHY to achieve precise strobe alignment, enabling robust high speed data read timing closure across PVT variations.Worked on Slew Rate Compensation (SCOMP) circuit for high speed CMD/CA Tx path, enabling robust slew-rate control with segmented driver architecture and tunable delay calibration across PVT variations.
Education
Birla Institute of Technology and Science, Pilani
Master of Technology - MTech, Microelectronics
2015 — 2017
Birla Vishvakarma Mahavidyalaya
Bachelor of Engineering - BE, Electronics Engineering
2010 — 2014
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