Ravi K.

About Ravi K.

Hands on experience in ASIC Verification(SOC, Sub System and IP Level).Block Level Verification of IP Modules using UVM Methodology.SOC Verification involving multi core DSP processors, using C and UVM based methodology.Development of reusable Verification Environment from scratch using SV/UVM.Formal Verification of Blocks using Assertion Based Verification, using tools like Jasper,VCFormal. Gate Level Simulations at Sub System level and SOC Level.Power Aware Verification using UPF at Sub System Level.Validation using Cadence Palladium for Asynchronous External Memory Interface module.Working knowledge on using OVM/UVM Verification Methodology.Perform static formal checks and coverage unreachability analysis on blocks.Automatic of Verification tasks using Scripting languages.Strong debugging skills. Ability to multitask effectively.Cross functional working experience,interacting with teams across different locations-Specialties- HDL\'s : VHDL,VerilogScripting : PerlCoding : CRevision Control : Perforce, ClearCase, icmanageHVL\'s : SystemVerilogMethodology : OVM/UVMTools : Synopsys VCS/DVE, Model-Sim,cadence ncsim, VerdiDomains : C66x Based SOCs,VBUS, FIFO Controller, SRAM, NOC Memories,PreSilicon Validation using cadence Palladium, DSP Core, UART, ETHERNETBus Protocols : APB,AXI.Formal Tools : IEV,IFV,Jasper,VCFormalOthers : Unix Make,Shell Scripts,Assembly, Debussy

Experience

1. Senior Verification Engineer

   NVIDIA

   Jul 2022 — Present · Denver, CO, US

   Verification of GPU Fixed Function hardware

Education

• SFS High School

  SSC

• International Institute of Information Technology Hyderabad (IIITH)

  Master's degree, VLSI Design

• Sri Chaitanya Junior College

  Intermediate, Maths-Physics-Chemistry

• Jawaharlal Nehru Technological University

  Bachelor's degree, Electronics and Communication