Ratnakar Bhatnagar
Senior Principal Application Engineer at Cadence Design Systems
- Role
- 铿腾设计系统公司
- Location
- West Delhi, DL, IN
- LinkedIn followers
- 500 followers
About Ratnakar Bhatnagar
Work with Customer to resolve there design specific issues on PGV Generation, Power…
Experience
Present
Skills
- Computer Architecture
- Vlsi
- Cpf
- Very-Large-Scale Integration (Vlsi)
- Tcl
- System on a Chip (Soc)
- Low-Power Design
- Application-Specific Integrated Circuits (Asic)
- Static Timing Analysis
- Soc
- Cadence
- Ic
- Integrated Circuits (Ic)
- 1801
- Vhdl
- Physical Design
- Debugging
- Eda
- Formal Verification
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