Rathnakar Ciddula
Physical Design Engineer | M.tech
- Role
- Physical Design Engineer at Tech Mahindra
- Location
- Hyderabad, TG, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Rathnakar Ciddula
Experienced in subsystem, block-level PNR, timing closure (STA), TCL Scripting, DFT and physical validations on technology node from 40nm, 28nm, 10nm and 7nm.Tool proficiency in FC, ICC2, PT, ICV, Spice simulations
Experience
Physical Design Engineer
Mar 2021 — Present · Bangalore Urban, IN
Education
CMR College of Engineering & Technology
Bachelor's degree, Electrical and Electronics Engineering
2012 — 2016
Malla Reddy (MR) Deemed to be University
Master of Technology - MTech, VLSI and ES
2017 — 2019
Find verified contacts for anyone on LinkedIn
Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.
Free plan included · No credit card required
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.