Rapolu Sushma
PPA (Power Performance Area) Design Engineer at Intel Corporation
- Role
- Ppa (Power Performance Area) Design Engineer at Intel
- Location
- Hyderabad, TG, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Rapolu Sushma
Experience on synthesis, LEC, EPS and STA Experience on Floor Plan, Macro…
Experience
Ppa (Power Performance Area) Design Engineer
Jun 2022 — Present · Hyderabad, IN
Education
CVR College of Engg
Bachelor of Technology (B.Tech.)
2008 — 2012
Skills
- Vhdl
- C
- Vlsi
- Physical Verification
- Tcl
- Timing Closure
- Floorplanning
- Modelsim
- C++
- Clock Tree Synthesis
- Physical Design
- Cmos
- Verilog
- Primetime
- Perl
- Asic
- Static Timing Analysis
- Drc
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