Rapolu Srikanth

About Rapolu Srikanth

Having 12.9 yr experience in SoC/Subsystems Verification.• He is a dynamic, results-driven professional with an ability to lead and mentor teams toward success. Srikanth excels in fostering innovation, taking complex technical SoC challenges, and delivering flawless SoCs aligning to organizational objectives.• Specialist in SoC Functional Verification, skilled in Pre-Silicon Verification. With functional domain expertise in SoC DV.• Well-equipped to handle end to end Verification of SoC Functional Correctness starting from RTL Simulation, progressing through Pre & Post silicon.• Collaborated with the Arch, Design, Functional DV, Emulation, Platform Debug, etc teams to understand Architecture and verification asks.• Ability to come with detailed testplan based on the Arch specs. Good understanding and exposure to SoC design and architecture• Good understanding of verification environments including need, methodology, stimulus, checkers, scoreboards, coverage aspects. Developing functional coverage & assertions.• Own the DV sign-off and ensure a bug free design• Comfortable with VCS/Verdi, NCSIM, Questasim and excellent debug skills. Tarmac debugging. • Mentoring team to perform a high performing delivery.Past experience is on following Subsystems & IP\'s -• CPU Subsystem (Compute): ARM A-Class Core, ARM R-Class Core,ARM M-Class Core & RISC-V.• PCR: Low-power, Clock, Reset in Subsystems & Soc. SoC Automotive Clock Monitoring Unit & Voltage Monitoring Unit. • Dynamic Voltage and Frequency scaling (DVFS), UPF brinup for low power verification.• Thorough knowledge in PCK-600 components like PPU, Clock controller, P&Q Channels.• Subsystem Clocking: PLL, Clock Dividers & Root Clock Generators• SoC Interrupt Controllers: GIC/NVIC/PLIC (ARM, RISC-V)• Communication Protocols: CAN-FD, Quad-SPI, I3C, I2C, MHU, UART• Bus Protocols: AXI/AHB/APB Bus protocol• Memory Controllers: NAND Flash Memory Controller & SRAM Memory Controller• GLS Verification and Formal Verification• SoC DV Testbench Development & SoC Bring-upProficient in following Programming Languages:• C & Embedded C• Verilog/UVM• Assembly• PythonHe has hands-on experience with following emulators & simulator• Synopsys VCS• Questa Sim• Candence NCSIM• Completed his M-Tech from JNTU Hyderabad (GRIET College), Qualified Gate.

Experience

1. Staff Engineer

   Arm

   Apr 2023 — Present · Bengaluru, IN

Education

• Sri Venkateswara College of Engineering

  Bachelor’s Degree, Electrical, Electronics and Communications Engineering

  2005 — 2009

• Jawaharlal Nehru Technological University

  Master’s Degree, VLSI

  2010 — 2012