Raphael Soetan
- Role
- Principal Engineer at Intel
- Location
- Chandler, AZ, US
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
Experience
Principal Engineer
Feb 2017 — Present · AZ, US
Process Technology Co-Optimization through PPA benchmarking and Test chips. I lead the test chip team.
Skills
- Fmea
- Vlsi
- Static Timing Analysis
- Hardware Architecture
- Engineering
- Functional Verification
- Microprocessors
- Low-Power Design
- Computer Architecture
- Failure Analysis
- Semiconductor Industry
- Arm
- Physical Design
- Power Management
- Cross-Functional Team Leadership
- Digital Signal Processors
- Mixed Signal
- Processors
- Circuit Design
- Cmos
- Soc
- Fpga
- Embedded Software
- Asic
- Timing Closure
- Dft
- Systems Engineering
- Simulations
- Engineering Management
- Intel
- Logic Design
- Ic
- Troubleshooting
- Semiconductors
- Systemverilog
- Verilog
- Testing
- Rtl Design
- Tcl
- Analog
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