Ranjith R

Experience

1. Management

   NVIDIA

   Jun 2011 — Present · Hyderabad, IN

   Responsible for delivering IO IP\'s like Ethernet, DSI, eMMC/SDMMC,*SPIx, low speed IO\'s, processor clusters for all of Tegra chips.Owns, IP Architecture, design, unit verification and SOC Verification of these IP\'s Was responsible for Unit FPGA prototyping for IO and Ultra Low Power IP\'s Worked on System FPGA and Silicon bring up Interfaced with SW and Customer teams to help solve customer issues Owns design, verification, validation and architecture. Working on developing technology for the next generation Tegra chips for self driving,gaming,AI.Actively involved in building teams and grooming leadership

Skills

• Fpga
• Asic
• Static Timing Analysis
• Verilog
• Ic
• Semiconductors
• Hardware Design
• Debugging
• Logic Synthesis
• Low-Power Design
• Rtl Design
• Dft
• Vlsi
• Simulations
• Soc
• Hardware Architecture
• Embedded Systems
• Functional Verification