Ranjith Nair
CAD Engineer
- Role
- Physical Design Methodology Engineer at Intel
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Ranjith Nair
Expertise in Physical Design automation and RTL2GDS2 methodology. Working experience in…
Experience
Physical Design Methodology Engineer
May 2024 — Present · Bengaluru, IN
Education
Cochin University of Science and Technology
Bachelors Degree
2002 — 2006
University of Leeds
Masters of Science
2010 — 2012
Skills
- Verilog
- Vhdl
- C
- C++
- Embedded C
- Objective-C
- Windows
- Linux
- Solaris
- Mac Os
- Cadence and Synopsys Eda Tools
- Physical Design Eda Tools
- Xilinx
- Altera Quartus
- Microchip Pic
- Shell Scripting
- Tcl/Tk
Find verified contacts for anyone on LinkedIn
Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.
Free plan included · No credit card required
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.