Ranjit Panda
Analog Layout Engineer | Experience in Analog and Mixed-signal Layout, Analog design | Proficient in Cadence Virtuoso, Custom Compiler | Creating Efficient Electronic Solutions
- Role
- Senior Engineer at Synopsys Inc
- Location
- Kolkata, WB, IN
- LinkedIn followers
- 500 followers
About Ranjit Panda
4 years of experience in Analog and Mixed-Signal (AMS) layout. Worked on GPIO, LVDS, RGMII layouts across different lower technology nodes: TSMC N2, TSMC N3E, TSMC 12FFC, TSMC-N7, Intel 18A, RAPIDUS 2HP.Seeking a challenging position in an organization that would provide me with ample opportunities to enhance my skills and strengths in conjunction with the company’s goals and objectives. 3+ years at Synopsys IO team as a Senior Engineer from 2022 to Present• Involved in in-depth and detailed analysis to meet the NextGen IP Specifications from the block level.• Worked on multiple transceivers (GPIO, LVDS, RGMII) and Base kit cells.• Worked on problem-solving with respect to the ESD and LUP issues.• Optimizing layouts for minimizing parasitic effects, matching, and fixed reliability issues such as EM and IR drop.• Driving layout productivity improvement initiatives (i.e,pcell development and automation).• Collaborating with circuit designers to translate schematics into robust, manufacturable layouts that meet performance, power, and area requirements.email ID - r••••••••@gmail.com
Experience
Senior Engineer
Jan 2024 — Present · IN
Education
Jadavpur University, Kolkata
Masters of engineering, Electronics and Communications Engineering
2019 — 2021
Indian Institute of Technology, Delhi
Research assistant, Integrated circuit and system
West Bengal University of Technology, Kolkata
Bachelor of Technology - BTech, Electronics and communication
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