Ranga Babu Ganta
Senior Staff Engineer @Samsung Semiconductor
Signup · Get unlimited contacts
WORK HISTORY
Senior Staff Engineer @Samsung Semiconductor
Bengaluru, IN
MPHY G6 48Gbps Design
EDUCATION
Western University
Summer Internship, Electrical and Electronics Engineering
Ecole polytechnique fédérale de Lausanne
Summer Internship, Advanced VLSI
Indian Institute of Technology, Kharagpur
Master's degree, VLSI
SKILLS
ABOUT RANGA BABU GANTA
48Gbps Mixed-mode Three-tap DFE Design (SF2P)2. 24GHz LC VCO Design for MPHYG5 (3GAP)3. Ring PLL Design (4nm, 3nm, 2nm, 8.5GHz)4. Low-Jitter Integer Ring PLL Design (14nm)5. MPHYG5 CMN TOP (Dual Charge Pump PLL with Dual Kvco)6. LDO Design (N40, N28, N22, N16, N3)(Including FVF)7. Bandgap Design (N28, N22, N3)8. ADT Attack Detector IP (5nm)9. Mentoring Juniors on Phase Interpolator Design.
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.