Rand Gray
Retired - Most Recently Engineering Manager at Intel
- Role
- Engineering Manager at Intel
- Location
- Hillsboro, OR, US
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
Experience
Engineering Manager
Mar 2015 — Present · Hillsboro, OR, US
I manage a debug engineering team responsible for architecture of microprocessor debug features, as well as debugging showstopper customer issues.
Skills
- Computer Architecture
- Semiconductor Industry
- Dft
- Pcie
- Static Timing Analysis
- Debugging
- Silicon
- Logic Design
- Signal Integrity
- Integrated Circuit Design
- Microprocessors
- Vlsi
- Eda
- Product Engineering
- Hardware Architecture
- System on a Chip (Soc)
- Systemverilog
- Semiconductors
- Test Engineering
- Soc
- Processors
- Cmos
- Mixed Signal
- Circuit Design
- Firmware
- Power Management
- Ic
- Rtl Design
- Low-Power Design
- Verilog
- Logic Analyzer
- Intel
- Functional Verification
- Fpga
- Asic
- Analog
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