Ramya Srinivasaraghavan
- Role
- Ip Logic Design Engineer at Intel
- Location
- Bengaluru, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Ramya Srinivasaraghavan
Over 17 years experience in ASIC front end design, micro architecture and pre-silicon…
Experience
Ip Logic Design Engineer
Jan 2018 — Present
Skills
- Field-Programmable Gate Arrays (Fpga)
- Verilog
- Logic Synthesis
- Computer Architecture
- Static Timing Analysis
- Soc
- Vlsi
- Very-Large-Scale Integration (Vlsi)
- Hardware Architecture
- Functional Verification
- Timing Closure
- Semiconductors
- Asic
- Hardware
- Fpga
- Systemverilog
- Rtl Design
- Debugging
- Eda
- Perl
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