Ramesh Ramaswamy
Bachelor’s degree in mathematics, Master’s Degree in Management, Professional in Semiconductor. Methodologist who defines Pre & Post silicon System Validation and System Debug based on Predictive and Generative AI
- Role
- Methodology Lead - System Validation & System Debug, Psg India at Intel
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Ramesh Ramaswamy
o A technocrat offering 23 years of experience in all aspects of Semiconductor…
Experience
Methodology Lead - System Validation & System Debug, Psg India
Dec 2021 — Present · IN
Key Result Areas: o Defined, Implemented Requirement & Coverage driven validation methodology o Defined Methodology to improve debug throughput using Predictive AI and Chatbot Automation system using Generative AISignificant Achievements: o Collaborated with Synopsys to implement VMS, VCPS, Verdi for Pre & Post Silicon Infrastructure o Collaborated with Siemens to bring up on Hardware Prototyping Platform o Mentoring next level Leadership Team and educating Junior Engineers
Skills
- Software Development
- Device Drivers
- Automation Tools
- Visual C++
- Arm
- Embedded Systems
- Embedded Linux
- Windows
- Linux
- Linux Server
- Development Tools
- C
- Dvb
- Embedded C
- Fpga
- Embedded Software
- Processors
- Assembly Language
- Silicon Validation
- Bsp
- Rtos
- .net
- Training
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