Ramesh Pilli
lead engineer,Senior at Qualcomm
- Role
- Senior Lead Engineer at 高通
- Location
- Hyderabad, TG, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
Experience
Senior Lead Engineer
Nov 2022 — Present · Hyderabad, IN
Education
Vellore Institute of Technology
Master's Degree, VLSI Design
2013 — 2015
Skills
- Tcl
- Shell Scripting
- Cadence Virtuoso
- Low-Power Design
- Vlsi
- Modelsim
- Asic Design and Verification
- Digital Ic Design
- Verilog
- Integrated Circuit Design
- Xilinx Ise
- Static Timing Analysis
- Digital Electronics
- Perl
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