Ramapriya Namo Achyutha
Senior Staff Engineer at Qualcomm
- Role
- Senior Staff Engineer at 美商高通國際股份有限公司
- Location
- Austin, TX, US
- LinkedIn followers
- 500 followers
About Ramapriya Namo Achyutha
SoC HW architect with deep knowledge on various ASIC design and Computer Architecture topics. 10+ years of industrial experience in designing coherent interconnects, high speed timing closure, QoS, low power methodologies and Post Silicon enablement. Have prior experience in automotive embedded software development at Robert Bosch (RBEI).Skill set:Programming: Verilog, SystemVerilog, C/C++, SystemCProtocols: ARM CHI/ACE/AXI/AHB Bus architecture protocols ASIC/EDA Flows: Lint, CDC, Static Timing Analysis, UPF, ECO, GLS debug
Experience
Senior Staff Engineer
Jun 2013 — Present · Austin, TX, US
SoC HW architect with deep knowledge in designing and architecting bus interconnects across various Qualcomm Snapdragon product lines. Well versed in AMBA CHI, AXI, AHB and low power (Q channel) protocols. Deployed interconnects in both RTL and modeling environments. Expertise in Silicon bring up and post Si debug.
Education
North Carolina State University
Master of Science (M.S.), Computer Engineering
2011 — 2013
BEL Educational Institutions
Schooling, Science
1993 — 2004
B. M. S. College of Engineering
BE, Electronics and Communications
2004 — 2008
Skills
- Cuda
- Computer Architecture
- Simulink
- Gdb
- Clearcase
- Debugging
- C
- Matlab
- C++
- Testing
- Microcontrollers
- Embedded Software
- Asic
- Vim
- Embedded C
- Linux
- Codewright
- Xmetal
- Canoe
- Embedded Systems
- Verilog
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