Kadiri Ramanjaneyareddy

About Kadiri Ramanjaneyareddy

RTL Design & Verification Engineer | VLSI EnthusiastI am an enthusiastic RTL Design and Verification Engineer with hands-on experience in VLSI design, working on real-world digital circuit development for ASIC and FPGA applications. My journey has been centered around transforming complex digital logic into efficient hardware solutions while ensuring functionality and reliability through rigorous verification processes. Tools & Technologies Design: Verilog, SystemVerilog, UVM methodologies. EDA Tools: ModelSim | questasim Key Highlights: RTL Design: Proficient in Verilog/VHDL for creating efficient and scalable digital circuits. Verification: Skilled in functional verification using tools like ModelSim, Cadence, and Synopsys. Testbenches: Expertise in developing and running testbenches to validate circuit performance. Optimization: Fine-tuning designs for timing, power, and area, ensuring optimal performance. 🤝 Teamwork: Collaborating with skilled engineers to troubleshoot, debug, and refine designs. 🧑‍🤝‍🧑 Passion & GoalsDriven by a deep passion for VLSI technology, I continuously expand my expertise in digital logic design, timing analysis, and advanced verification methodologies. I am committed to contributing to cutting-edge semiconductor innovations 🪙 while embracing the challenges of this dynamic and evolving field. Let’s connect to discuss VLSI, semiconductor technology, and groundbreaking hardware solutions!

Experience

1. Promoted Rtl Designer

   Prssemicon Technologies A Prsgroup Company

   May 2025 — Present

Education

• VLSI FIRST

  RTL DESINING AND VERIFICATION ENGINNER