Ramandeep Nain
M.Tech in VLSI Design @ TIET | & Tanner EDA | Python& Linux Scripting | Verilog/VHDL | Enthusiastic Learner in ASIC/FPGA Design |
- Role
- Defence Research and Development Organisation (Drdo) at Research and Development Organisation
- Location
- Patiala, PB, IN
- LinkedIn followers
- 500 followers
Research & DevelopmentView LinkedIn profile
Experience
Defence Research and Development Organisation (Drdo)
Research and Development Organisation
Present
Education
Chaudhary Ranbir Singh University (CRSU), Jind
Bsc (Non medical), Physcis - Chemistry - Math
Gurukul Kurukshetra Haryana
12th Higher secondary education , Non medical
Kurukshetra University
Master of Science - MS, Electronics Science
Thapar Institute of Engineering & Technology
M.Tech, VLSI Design
Kurukshetra University
MSC ELECTRONIC SCIENCE , Electrical, Electronics and Communications Engineering
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