Ramakrishna Reddy A
ASIC Verification Architect at Wipro Technologies
- Role
- Asic Verification Architect at Wipro
- Location
- Hyderabad, TG, IN
- LinkedIn followers
- 500 followers
Experience
Asic Verification Architect
Apr 2014 — Present
VLSI ASIC/SOC Verification.
Education
Sri Venkateswara University
Master’s Degree, MS in Public Relations
2006 — 2008
Nagpur University
BE Electronic Engineering
1989 — 1994
Manav Bharti University
Master of Technology (M.Tech.), ECE
2009 — 2012
Skills
- Asic
- Functional Verification
- Allegro
- Rtl Coding
- Rtl Design
- Systemverilog
- Amba Ahb
- Verilog
- Pcie
- Soc
- Fpga
- Eda
- Vlsi
- Static Timing Analysis
- I2c
- Modelsim
- Timing Closure
- Usb
- Ncsim
- Uvm
- Logic Design
- Dft
- Open Verification Methodology
- Application-Specific Integrated Circuits (Asic)
- Very-Large-Scale Integration (Vlsi)
- System on a Chip (Soc)
- Universal Verification Methodology (Uvm)
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