Rakesh Madala
Googler | Ex-Intel
- Role
- Silicon Physical Design Manager at Google
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
Experience
Silicon Physical Design Manager
Feb 2025 — Present · Bengaluru, IN
Education
National Institute of Technology Calicut
Master of Technology (M.Tech.), Electronics Design and Technology
2010 — 2012
Skills
- Vlsi
- Static Timing Analysis
- Physical Design
- Static Low Power Verification
- Debugging
- Perl
- Eda
- Synthesis
- Vhdl
- Upf
- Systemverilog
- Asic
- Verilog
- Low Power Synthesis
- C
- Soc
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