Rajneesh Kumar Singh
Lead System Validation Engineer at Cadence Design Systems || PCIe
- Role
- Lead Design Engineer at Cadence
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
Experience
Lead Design Engineer
Jul 2024 — Present
Education
National Institute of Technology, Tiruchirappalli
Master of Technology - MTech, Communication Systems
2019 — 2021
Maharana Prataap College of Engineering
B. tech, Electronics and Communications Engineering
2014 — 2018
Find verified contacts for anyone on LinkedIn
Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.
Free plan included · No credit card required
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.