Raj Kumar
Design Engineer at TSMC
- Role
- Design Engineer at 台積電
- Location
- San Jose, CA, US
- LinkedIn followers
- 500 followers
About Raj Kumar
Digital ASIC Design and Verification enthusiast, focusing on back-end Physical Design.Skills: • EDA Tools : Cadence NCLaunch, Cadence Genus, Cadence Tempus, Cadence Innovus, Cadence Virtuoso, Xilinx ISE, ModelSim• Hardware Description Languages : Verilog, VHDL• Scripting Languages : TCL• Hardware Platforms : Artrix-7 Nexys-4 DDR FPGA • Operating System : Linux, Windows• Software Packages : Microsoft Office Suite
Experience
Design Engineer
Jun 2023 — Present · San Jose, CA, US
Education
Jaypee University of Engineering and Technology
Bachelor of Technology - BTech, Electronics and Communication Engineering
2014 — 2018
University of Southern California
Master of Science - MS, Electrical Engineering
Kendriya Vidyalaya No. 2, Bhopal, India
Higher Secondary Examination (CBSE)
2011 — 2012
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