Rajeshwari Lingaraddi

About Rajeshwari Lingaraddi

Working as layout lead Engineer in Qualcomm India Pvt Ltd. • Hands on experience in RF,High speed analog and mixed mode layout design. • Involved with multiple Tape out. • Delivered complete RF modules such as TX/RX/FBRX/MBIAS. • Delivered multiple core modules such as LNA,Mixer,BBF,PA. • Delivered multiple analog modules like LDO,PLL,DAC,ADC and PLL. Worked on Serdes Serilizer/deserilizer equalizer driver pll. • Expertise in Floorplan,Placement,Routing and verification from block level to module level. • Expert in LVS/DRC debugging. • Knowledge on layout techniques such as device matching, minimizing parasitic capacitance, shielding, High frequency signal routing, isolation and sub-micron layout effects like LOD,WPE,etc. • Good understanding in reliability issues like EM,Latch up, antenna effect and ESD etc. TOOLS and PROCESS WORKED Back end Tools IC layout Tools : Cadence virtuoso L,XL,SkillCad and SVRF Layout Verification Tools: Caliber, Assura and Totem ESD pathfinder. Process Technology : 28nm,40nm,65nm,180nm,14nm/6nm/4nm Finfet.

Experience

1. Lead Layout Engineer

   Qualcomm

   Sep 2017 — Present · Bengaluru, IN

   Working on RF TX/RX, FRRX and MBIAS blocks,Including floor plan,routing and verification checks like DRC, LVS, Density,ERC/ESD/ANTENNA.Involved in tapeout for subghz mm wave projects. Delivered RF core modules like Mixer,LNA.BBF,PA.

Education

• B V B College of Engg. & Technology, HUBLI

  Master of Technology (M.Tech.), Digital electronics

  2009 — 2011

• Visvesvaraya Technological University

  Bachelor of Engineering (BE), Electrical, Electronics and Communications Engineering

  2005 — 2009