Rajesh Rajaram
- Role
- Soc Design Engineer at Intel
- Location
- San Jose, CA, US
- LinkedIn followers
- 500 followers
About Rajesh Rajaram
Career spanning more than 16 years of extensive experience, with direct contributing…
Experience
Soc Design Engineer
Jul 2016 — Present
Multiple IP Integration into SoC\'s, and Validation, Formal flows.
Education
Indian Institute of Technology, Madras
MS, Microelectronics
1996 — 1999
Maulana Azad College
HSC, electronics physics
Government Engineering College Aurangabad
BE (EC), Electronics and Telecommunications
Find verified contacts for anyone on LinkedIn
Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.
Free plan included · No credit card required
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.