Rajat Govil
Design Engineer Ii @Vervesemi
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WORK HISTORY
Design Engineer Ii @Vervesemi
Noida, IN
EDUCATION
Maharaja Surajmal Institute Of Technology
Bachelor of Technology - BTech
ABOUT RAJAT GOVIL
A conscientious person with a predilection towards VLSI Design, Music and learning various new things! My skills include : • EDA Tools :>Cadence Innovus >Cadence Virtuoso >Cadence Xcelium >Cadence IMC >Cadence Genus >Xilinx Vivado >Calibre(Beginner) • Scripting languages:>TCL >Shell(grep, sed & awk)>Python • Anciliary skills:> gVim > Makefile > MS Excel • Experience in Physical Design (Floorplan, Placement, CTS, Routing & Signoff) with 180nm, 55nm and 22nm tech nodes. • Proficient in Verilog (for RTL & Testbenches) with hands-on experience in Behavioural and Gate-Level Simulations. • Practical knowledge of DSP in areas such as:>FFT >Digital Filters (SINC, FIR/Moving Average)>Sine Generators • Excellent English Proficiency
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