Rajasekhar Reddy Bogathi
AMS layout Engineer at INTEL
- Role
- Analog and Mixed Signal (Ams) Layout Engineer at Intel at Intel
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Rajasekhar Reddy Bogathi
PROFESSIONAL SUMMARY:# Having 7+ years of experience in Analog & Mixed Signal layout Design.# Worked on the different technology nodes such as 18A, 3nm, 7nm, 10nm, 45nm, 130nm.# Worked with process from various foundries like INTEL and TSMC.# Construction of Designing layout with an awareness of “Design For Manufacturing”.# Expert on HV/EHV verification in INTEL 18A, 7nm and TSMC 3nm node.# Adept in analyzing and resolving LVS, ERC, Antenna effect and Density issue and Latch-up.# Good understanding of Parasitics, Device matching techniques and Noise reduction techniques.# Worked on the various sub-blocks, such as DFE_Sampler, DCO_ring Oscillator, PI (Phase interpolator), TX and CLK_TOP and custom standard cells design for high-speed clock path in TX and RX blocks.# Worked on the Reliability Verification (RV) such as Electro-Migration and IR-drop.
Experience
Analog and Mixed Signal (Ams) Layout Engineer at Intel
Feb 2022 — Present · Bengaluru, IN
Analog Layout Engineer at Intel Corporation
Education
Vasavi polytechnic college
Electrical and Electronics Engineering
2010 — 2013
Jawaharlal Nehru Technological University, Anantapur
Bachelor’s Degree, Electrical and Electronics Engineering
2013 — 2016
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