Rahul Jain

About Rahul Jain

5+ years of experience in MIXED SIGNAL Design IP\'s -> Years of experience in SoC Design and integration -> 18+ year of professional experience in hardware design and development of ASIC products-> Extensive experience in micro architecture design, logic design and RTL Implementation in Verilog HDL from scratch for required standard/specification-> Experience in design flow automation, helped to reduce \"time to market\"-> Strong knowledge in High speed SERDES PHY\'s -> Specialist in decision feedback equalization (DFE) in SERDES-> Developed Micro-architecture, successfully designed and implemented DFE PHY 8G/10G-> Experience in handing multiple projects -> Excellent knowledge in STA/Lint/CDC analysis -> Experience in SDF back annotation simulation (GLS)-> Experience in customer support Verification -> Developed new testcases to hit code coverage more than 95%-> Successful track record of working on new flows and methodologies and proven record of producing high quality work ahead of schedule-> Expert in ramping up team/project, hiring, work delegation, objective setting and performance evaluation and overall project managemen-> Excellent ability to communicate with all departments in a design cycleSpecialties:* Verilog for RTL coding. Cadence -Verilog-XL, NC – Verilog, Modelsim for RTL/netlist simulation - RC for synthesis - ET for DFT, ATPG vector generation, scan chain insertion - ETS for STA Synopsys – DC for SynthesisCVS and SVN for Data managementPaper - Visit my blog to know more on VLSIBlog - http://rtldigitaldesign.blogspot.in/

Experience

1. Principal Design Engineer

   Infineon Technologies

   Dec 2020 — Present · Bengaluru, IN

Education

• Birla Institute of Technology and Science, Pilani

  Master of Technology - MTech, Microelectronics

  2018 — 2020

Skills

• Modelsim
• Logic Design
• Project Team Management
• Debugging
• Very-Large-Scale Integration (Vlsi)
• Functional Verification
• Timing
• Mixed Signal
• Asic
• Serdes
• Logic Synthesis
• Vhdl
• Simulations
• Rtl Coding
• Team Management
• Pcie
• Rtl Design
• Cadence
• Atpg
• C
• Vlsi
• Timing Closure
• Static Timing Analysis
• Integrated Circuit Design
• Dft
• Ncsim
• Hardware Architecture
• Application-Specific Integrated Circuits (Asic)
• Verilog
• System on a Chip (Soc)
• Soc