Rahul Reddy Chetteti
Analog Design Engineer @ Cadence Design Systems | IIT Bombay
- Role
- Design Engineer Ii at Cadence
- Location
- Warangal Urban, TG, IN
- LinkedIn followers
- 500 followers
About Rahul Reddy Chetteti
I\'m an aspiring Analog Design Engineer with a passion for turning complex ideas into functional, efficient circuits. Currently, I\'m pursuing my M.Tech in Electrical Engineering at IIT Bombay, where I’m diving deep into the world of analog, RF, and mixed-signal IC design. I love the challenge of solving intricate design problems, and my coursework and projects have given me hands-on experience with technologies like Cadence Virtuoso, Verilog-A, and more.A big highlight for me was securing an All India Rank of 276 in GATE-2023, reaffirming my commitment to this field. I’m currently working on my master’s thesis, where I’m automating the design of a low-power CMOS buck-boost regulator, learning a ton in the process about optimization and efficiency in 65nm tech. Other projects like designing OTAs, ADCs, and VCOs have helped me grow my practical skills and learn the ins and outs of circuit design from scratch.Outside of work and studies, I enjoy swimming, photography, and playing sports like cricket and volleyball. I’m always looking to learn something new and excited to take the next step in my journey, where I can contribute my skills and continue growing as an engineer.
Experience
Design Engineer Ii
Jul 2025 — Present · Bangalore Urban, IN
Education
Central University of Karnataka
Bachelor of Technology - BTech, Electrical, Electronics and Communications Engineering
Narayana Junior College - India
Senior Secondary, Mathematics, Physics, Chemistry
2016 — 2018
Indian Institute of Technology, Bombay
Master of Technology - MTech, Solid State Devices
Dr. KKR's Gowtham High School
High School Diploma, General
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