Rahul Ranjan Kumar
AMS Verification Engineer at Cadence | Ex-Intel | NIT Surat
- Role
- Lead Design Engineer at Cadence
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Rahul Ranjan Kumar
VLSI Design and Verification enthusiast with a strong background in Verilog, UVM, System Verilog, and System Verilog Assertions. Experienced in Functional as well as formal Verification. Masters in VLSI from NIT, Surat. Completed 1-year internship at INTEL, Bengaluru. Strong knowledge in Digital Circuits, Digital VLSI Design, Image processing architectures, and VLSI system design. Worked in various academic projects using the FPGA development tool and FPGA boards. Effective collaborator, fast learner & ability to work individually and as a part of a team.
Experience
Lead Design Engineer
Jun 2025 — Present · Hyderabad, IN
Education
Rajiv Gandhi Prodyogiki Vishwavidyalaya
Bachelor of Engineering, Electronics and Communications Engineering
2012 — 2016
Sardar Vallabhbhai National Institute of Technology, Surat
Master of Technology - MTech, VLSI & Embedded System
2018 — 2020
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