Rahul Pandey
FPGA Silicon Validation Engineer @ Altera
- Role
- System Validation Engineer at Intel
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Rahul Pandey
Post-Silicon Validation Engineer with 4+ years of experience, including 2+ years at…
Experience
System Validation Engineer
Jun 2023 — Present · Bengaluru, IN
Education
Vidyalankar Institute of Technology, Mumbai
Bachelor of Engineering (BE), Electronics and telecommunication
2015 — 2019
Vellore Institute of Technology
Master of Technology - MTech, Embedded Systems
NES junior college.
HSC, science / bifocal electronics
2013 — 2015
IES Ganesh Nagar Vidyalaya
SSC
2008 — 2013
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