Rahul Kumar
Asic Fpga Design and Verification Engineer @Valeo
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WORK HISTORY
Asic Fpga Design and Verification Engineer @Valeo
Kronach, DE
EDUCATION
Sri Dharmasthala Manjunatheswara College of Engineering & Technology, Dharwad
Bachelor of Engineering - BE, Electrical and Electronics Engineering
Technische Universität Dresden
Master of Science - MS, Nanoelectronics system
ABOUT RAHUL KUMAR
As an ASIC/FPGA Design and Verification Engineer at Valeo, I apply my expertise in nanoelectronics systems to develop innovative solutions for the automotive industry. I hold a Master of Science degree in Nanoelectronics System from Technische Universität Dresden and a Bachelor of Engineering degree in Electrical and Electronics Engineering from Sri Dharmasthala Manjunatheswara College of Dharwad.I have also gained valuable experience through internships at Fraunhofer IIS, where I worked on projects related to adaptive systems engineering. I am proficient in digital electronics, digital circuit design, and computer architecture, and I have earned certifications in Basic Static Timing Analysis and SystemVerilog for Verification and UVM. My goal is to continue learning and growing as a professional in the field of nanoelectronics and embedded systems.
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