Raghupathi Reddy Shanigarapu

WORK HISTORY

EDUCATION

ABOUT RAGHUPATHI REDDY SHANIGARAPU

I started noticing a pattern early in my work, most systems don’t fail because they are complex they fail because they are inefficient. That insight led me to focus on low-power VLSI and embedded system design, where even small inefficiencies translate into real losses in energy and electronic systems. I have been working on battery management systems for electric vehicles and renewable microgrids, focusing on reducing power loss while maintaining system stability. In one project, I analyzed a BMS design that showed unnecessary power consumption and unstable behavior under load. By restructuring the hardware architecture and validating it through FPGA prototyping and simulation, I reduced power consumption by 15–25% while maintaining stable performance across different operating conditions. At the implementation level, I improved hardware efficiency through RTL design optimization, achieving a ~20% reduction in FPGA resource utilization. To ensure reliability, I tested the system across 50+ simulation scenarios in MATLAB/Simulink, identifying and correcting failure points before deployment. My work combines Verilog RTL, embedded systems, and system-level simulation to move designs from concept to validated hardware. I focus on identifying where systems break, improving efficiency under constraints, and delivering measurable performance improvements. I am now preparing to advance this work through a master’s degree in Germany, where I aim to deepen my expertise in low-power semiconductor design, embedded systems, and energy-efficient architectures. My long-term goal is to contribute to the development of reliable, energy-efficient hardware for electric mobility and large-scale energy systems within Europe’s semiconductor and automotive ecosystem.